K60P100M100SF2RM Datasheet, PDF (1298/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional Description
An interrupt is generated only if the CONTROL[IE] bit is set. The CONTROL[IF] bit is
always set under interrupt conditions, even if the IE bit is cleared. In this case, software
can poll the IF flag to determine if an interrupt condition is pending.
Writes to the IF bit are ignored. To reset the IF bit, set the CONTROL[IACK] bit to
acknowledge the interrupt.Writing to the IACK bit while the IF bit is cleared has no
effect.
46.5.3 Resets
There are two ways to reset various register contents in this module: hardware resets and
a software reset.
46.5.3.1 Hardware Resets
Hardware resets originate at the system or device level and propagate down to the
individual module level. They include power-on reset, low-voltage reset, and all other
hardware reset sources.
Hardware resets cause the register contents to be restored to their default state as listed in
the register descriptions.
46.5.3.2 Software Reset
A software reset re-initializes the module's status information but leaves configuration
information unchanged. The software reset allows software to prepare the module
without needing to reprogram the same configuration each time the USB device is
plugged into a USB port.
Setting the CONTROL[SR] bit initiates a software reset. The following table shows what
register fields are reset to their default values by a software reset.
Table 46-19. Software Reset and Register Fields Affected
Register
CONTROL¹
STATUS
CLOCK
TIMERn
Fields Affected
[IF]
All
None
TUNITCON
Fields Not Affected
[IE, START]
None
All
All other
1. The CONTROL[SR, IACK] bits are self-clearing.
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.