K60P100M100SF2RM Datasheet, PDF (313/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 13 Mode Controller
certain asynchronous mode peripherals are operating with the remainer of the MCU
powered off. The tradeoffs depend upon the user's application, where power usage and
state retention versus functional needs are weighed.
The various stop modes are selected by setting the appropriate bits in the power mode
protection (PMPROT) and power mode control (PMCTRL) registers. The selected stop
mode mode is entered during the sleep-now or sleep-on-exit entry with with the
SLEEPDEEP bit set in the System Control Register in the ARM core.
The available stop modes are:
• Stop
• Very low power stop (VLPS)
• Low leakage stop (LLS)
• Very low leakage stop 1 (VLLS1)
• Very low leakage stop 2 (VLLS2)
• Very low leakage stop 3 (VLLS3)
13.1.2.4.1 Stop Mode
Stop mode is entered via the sleep-now or sleep-on-exit with the SLEEPDEEP bit set in
the System Control Register in the ARM core.
The MCG module can be configured to leave the reference clocks running.
A module capable of providing an asynchronous interrupt to the device (for example, an
enabled pin interrupt, NMI, RTC, LVW, UART wakeup on edge, CMP, or ADC) takes
the device out of stop mode and returns the device to normal run mode. Reference Table
13-1 for peripheral, I/O, and memory operation in stop. When an interrupt request occurs,
the CPU exits stop mode and resumes processing, beginning with the stacking operations
leading to the interrupt service routine.
An asserted RESET pin, a watchdog timeout, or LVD with LVDRE set exits stop mode.
The device returns to normal run mode via a MCU reset.
13.1.2.4.2 Very Low Power Stop (VLPS) Mode
VLPS mode can be entered in one of two ways:
• Entry into stop via the sleep-now or sleep-on-exit with the SLEEPDEEP bit set in the
System Control Register in the ARM core while the MCU is in very low power run
(VLPR) mode and configured as per Table 13-2.
• When the MCU is in normal run mode with LPLLSM set to 010b, entry into stop via
the sleep-now or sleep-on-exit with the SLEEPDEEP bit set in the System Control
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
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