K60P100M100SF2RM Datasheet, PDF (6/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Section Number
Title
Page
3.7 Analog...........................................................................................................................................................................116
3.7.1 16-bit SAR ADC with PGA Configuration.................................................................................................116
3.7.2 CMP Configuration......................................................................................................................................124
3.7.3 12-bit DAC Configuration...........................................................................................................................126
3.7.4 VREF Configuration....................................................................................................................................127
3.8 Timers...........................................................................................................................................................................128
3.8.1 PDB Configuration......................................................................................................................................128
3.8.2 FlexTimer Configuration.............................................................................................................................131
3.8.3 PIT Configuration........................................................................................................................................135
3.8.4 Low-power timer configuration...................................................................................................................136
3.8.5 CMT Configuration......................................................................................................................................138
3.8.6 RTC configuration.......................................................................................................................................139
3.9 Communication interfaces............................................................................................................................................140
3.9.1 Ethernet Configuration.................................................................................................................................140
3.9.2 Universal Serial Bus (USB) Subsystem.......................................................................................................142
3.9.3 CAN Configuration......................................................................................................................................148
3.9.4 SPI configuration.........................................................................................................................................150
3.9.5 I2C Configuration........................................................................................................................................153
3.9.6 UART Configuration...................................................................................................................................154
3.9.7 SDHC Configuration....................................................................................................................................157
3.9.8 I2S configuration..........................................................................................................................................158
3.10 Human-machine interfaces (HMI)................................................................................................................................160
3.10.1 GPIO configuration......................................................................................................................................160
3.10.2 TSI Configuration........................................................................................................................................161
Chapter 4
Memory Map
4.1 Introduction...................................................................................................................................................................165
4.2 System memory map.....................................................................................................................................................165
4.2.1 Aliased bit-band regions..............................................................................................................................166
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
6
Freescale Semiconductor, Inc.