K60P100M100SF2RM Datasheet, PDF (1687/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
Chapter 53 Integrated interchip sound (I2S)
I2Sx_RX1 field descriptions (continued)
Description
FIFOs are in use, data is transferred to each data register alternately. RX1 can only be used in two-
channel mode of operation.
53.3.5 I²S Control Register (I2Sx_CR)
The I2S Control Register (CR) sets up the I2S. I2S reset is controlled by bit 0 in the CR.
I2S operating modes are also selected in this register (except AC97 mode which is
selected in the ACNT register).
Addresses: I2S0_CR is 4002_F000h base + 10h offset = 4002_F010h
Bit 31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
0
W
I2SMODE SYN NET RE TE
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
I2Sx_CR field descriptions
Field
31–13
Reserved
12
SYNCTXFS
Description
This read-only field is reserved and always has the value zero.
SYNCTXFS bit provides a safe window for CR[TE] to be visible to the internal circuit which is just after FS
occurrence. When SYNCTXFS is set, CR[TE] gets latched on FS occurrence and latched CR[TE] is used
to enable/disable I²S transmitter. CR[TE] needs setup of 2 bit-clock cycles before occurrence of FS. If
CR[TE] is changed within 2 bit-clock cycles of FS occurrence, there is high probability that CR[TE] will be
latched on next FS.
NOTE: With TFRCLKDIS feature on, CR[TE] is used directly to enable transmitter in following cases (i)
Sync mode and Rx disabled (ii) Async Mode. Latched-TE is used to disable the transmitter.
This bit has no relevance in gated mode and AC97 mode.
11
RFRCLKDIS
0 CR[TE] not latched with FS occurrence and used directly for transmitter enable/disable.
1 CR[TE] latched with FS occurrence and latched-TE used for transmitter enable/disable.
Receive Frame Clock Disable.
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1687