K60P100M100SF2RM Datasheet, PDF (711/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 29 External Bus Interface (FlexBus)
4. S3: FB_CSn is negated at the fourth rising clock edge. This last clock of the bus
cycle uses what would be an idle clock between cycles to provide hold time for
address, attributes, and write data.
29.4.5.1 Data Transfer Cycle States
An on-chip state machine controls the data-transfer operation in the device. The
following figure shows the state-transition diagram for basic read and write cycles.
Next Cycle
S3
S0
Wait States
S1
S2
Figure 29-25. Data-Transfer-State-Transition Diagram
The following table describes the states as they appear in subsequent timing diagrams.
Table 29-29. Bus Cycle States
State
S0
S1
S2
S3
Cycle
All
All
Read
All
Read
All
Description
The read or write cycle is initiated. On the rising clock edge, the device places a
valid address on FB_ADn, asserts FB_TS/FB_ALE, and drives FB_R/W high for
a read and low for a write.
FB_TS/FB_ALE is negated on the rising edge of FB_CLK, and FB_CSn is
asserted. Data is driven on FB_AD[31:X] for writes, and FB_AD[31:X] is tristated
for reads. Address continues to be driven on the FB_AD pins that are unused for
data.
If FB_TA is recognized asserted, then the cycle moves on to S2. If FB_TA is not
asserted internally or externally, then the S1 state continues to repeat.
Data is driven by the external device before the next rising edge of FB_CLK (the
rising edge that begins S2) with FB_TA asserted.
For internal termination, FB_CSn is negated and the internal system bus
transfer is completed. For external termination, the external device should
negate FB_TA, and the FB_CSn chip select negates after the rising edge of
FB_CLK at the end of S2.
The processor latches data on the rising clock edge entering S2. The external
device can stop driving data after this edge. However, data can be driven until
the end of S3 or any additional address hold cycles.
Address, data, and FB_R/W go invalid off the rising edge of FB_CLK at the
beginning of S3, terminating the read or write cycle.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
711