K60P100M100SF2RM Datasheet, PDF (1502/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory map and registers
51.3.10 UART Match Address Registers 2 (UARTx_MA2)
These registers can be read and written at anytime. The MA1 and MA2 registers are
compared to input data addresses when the most significant bit is set and the associated
C4[MAEN] bit is set. If a match occurs, the following data is transferred to the data
register. If a match fails, the following data is discarded.
Addresses: UART0_MA2 is 4006_A000h base + 9h offset = 4006_A009h
UART1_MA2 is 4006_B000h base + 9h offset = 4006_B009h
UART2_MA2 is 4006_C000h base + 9h offset = 4006_C009h
UART3_MA2 is 4006_D000h base + 9h offset = 4006_D009h
UART4_MA2 is 400E_A000h base + 9h offset = 400E_A009h
Bit
7
6
5
4
3
2
1
0
Read
MA
Write
Reset
0
0
0
0
0
0
0
0
UARTx_MA2 field descriptions
Field
7–0
MA
Match Address
Description
51.3.11 UART Control Register 4 (UARTx_C4)
Addresses: UART0_C4 is 4006_A000h base + Ah offset = 4006_A00Ah
UART1_C4 is 4006_B000h base + Ah offset = 4006_B00Ah
UART2_C4 is 4006_C000h base + Ah offset = 4006_C00Ah
UART3_C4 is 4006_D000h base + Ah offset = 4006_D00Ah
UART4_C4 is 400E_A000h base + Ah offset = 400E_A00Ah
Bit
7
6
5
4
3
2
1
0
Read
MAEN1
MAEN2
M10
Write
BRFA
Reset
0
0
0
0
0
0
0
0
UARTx_C4 field descriptions
Field
7
MAEN1
Match Address Mode Enable 1
Description
Refer to Match address operation for more information.
Table continues on the next page...
1502
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.