K60P100M100SF2RM Datasheet, PDF (372/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional Description
The crossbar terminates all master IDLE transfers, as opposed to allowing the termination
to come from one of the slave busses. Additionally, when no master is requesting access
to a slave port, the crossbar drives IDLE transfers onto the slave bus, even though a
default master may be granted access to the slave port.
When a slave bus is being idled by the crossbar, it can park the slave port on the master
port indicated by CRSn[PARK]. This is done to save the initial clock of arbitration delay
that otherwise would be seen if the master had to arbitrate to gain control of the slave
port. The slave port can also be put into Low Power Park mode to save power, by using
CRSn[PCTL].
17.3.2 Register coherency
Because the content of the registers has a real-time effect on the operation of the crossbar,
it is important to understand that any register modifications take effect as soon as the
register is written. The values of the registers do not track with slave-port-related master
accesses, but instead track only with slave accesses.
The MGPCRx[AULB] bits are the exception to this rule. The update of these bits is only
recognized when the master on that master port runs an IDLE cycle, even though the
slave bus cycle to write them will have already terminated successfully. If the
MGPCRx[AULB] bits are written between two burst accesses, the new AULB encodings
do not take effect until an IDLE cycle is initiated by the master on that master port.
17.3.3 Arbitration
The crossbar switch supports two arbitration schemes:
• A fixed-priority comparison algorithm
• A round-robin fairness algorithm
The arbitration scheme is independently programmable for each slave port.
17.3.3.1 Arbitration during undefined length bursts
Arbitration points during an undefined length burst are defined by the current master's
MGPCR[AULB] field setting. When a defined length is imposed on the burst via the
AULB bits, the undefined length burst is treated as a single or series of single back-to-
back fixed-length burst accesses.
The following figure illustrates an example:
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
372
Freescale Semiconductor, Inc.