K60P100M100SF2RM Datasheet, PDF (16/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Section Number
Title
Page
Chapter 20
Direct memory access multiplexer (DMAMUX)
20.1 Introduction...................................................................................................................................................................417
20.1.1 Overview......................................................................................................................................................417
20.1.2 Features........................................................................................................................................................418
20.1.3 Modes of operation......................................................................................................................................418
20.2 External signal description............................................................................................................................................419
20.3 Memory map/register definition...................................................................................................................................419
20.3.1 Channel Configuration Register (DMAMUX_CHCFGn)...........................................................................420
20.4 Functional description...................................................................................................................................................421
20.4.1 DMA channels with periodic triggering capability......................................................................................421
20.4.2 DMA channels with no triggering capability...............................................................................................424
20.4.3 "Always enabled" DMA sources.................................................................................................................424
20.5 Initialization/application information...........................................................................................................................425
20.5.1 Reset.............................................................................................................................................................425
20.5.2 Enabling and configuring sources................................................................................................................425
Chapter 21
Direct Memory Access Controller (eDMA)
21.1 Introduction...................................................................................................................................................................429
21.1.1 Block diagram..............................................................................................................................................429
21.1.2 Block parts...................................................................................................................................................430
21.1.3 Features........................................................................................................................................................432
21.2 Modes of operation.......................................................................................................................................................433
21.3 Memory map/register definition...................................................................................................................................433
21.3.1 Control Register (DMA_CR).......................................................................................................................448
21.3.2 Error Status Register (DMA_ES)................................................................................................................450
21.3.3 Enable Request Register (DMA_ERQ).......................................................................................................452
21.3.4 Enable Error Interrupt Register (DMA_EEI)...............................................................................................454
21.3.5 Clear Enable Error Interrupt Register (DMA_CEEI)..................................................................................456
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
16
Freescale Semiconductor, Inc.