K60P100M100SF2RM Datasheet, PDF (288/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory map and register definition
SIM_SCGC4 field descriptions
Field
31
Reserved
30–29
Reserved
28
LLWU
Description
This read-only field is reserved and always has the value zero.
This read-only field is reserved and always has the value one.
LLWU Clock Gate Control
This bit controls the clock gate to the LLWU module.
27–21
Reserved
20
VREF
0 Clock disabled
1 Clock enabled
This read-only field is reserved and always has the value zero.
VREF Clock Gate Control
This bit controls the clock gate to the VREF module.
19
CMP
0 Clock disabled
1 Clock enabled
Comparator Clock Gate Control
This bit controls the clock gate to the comparator module.
18
USBOTG
0 Clock disabled
1 Clock enabled
USB Clock Gate Control
This bit controls the clock gate to the USB module.
17–14
Reserved
13
UART3
0 Clock disabled
1 Clock enabled
This read-only field is reserved and always has the value zero.
UART3 Clock Gate Control
This bit controls the clock gate to the UART3 module.
12
UART2
0 Clock disabled
1 Clock enabled
UART2 Clock Gate Control
This bit controls the clock gate to the UART2 module.
11
UART1
0 Clock disabled
1 Clock enabled
UART1 Clock Gate Control
This bit controls the clock gate to the UART1 module.
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
288
Freescale Semiconductor, Inc.