K60P100M100SF2RM Datasheet, PDF (239/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

10.4.1
Core Modules
Chapter 10 Signal Multiplexing and Signal Descriptions
Table 10-2. JTAG Signal Descriptions
Chip signal name
Module signal Description
I/O
name
JTAG_TMS
JTAG_TMS/
JTAG Test Mode Selection
I/O
SWD_DIO
JTAG_TCLK
JTAG_TCLK/
JTAG Test Clock
I
SWD_CLK
JTAG_TDI
JTAG_TDI
JTAG Test Data Input
I
JTAG_TDO
JTAG_TDO/
JTAG Test Data Output
O
TRACE_SWO
JTAG_TRST
JTAG_TRST_b JTAG Reset
I
Table 10-3. SWD Signal Descriptions
Chip signal name
Module signal Description
I/O
name
SWD_DIO
JTAG_TMS/
Serial Wire Data
I/O
SWD_DIO
SWD_CLK
JTAG_TCLK/
Serial Wire Clock
I
SWD_CLK
Chip signal name
TRACE_CLKOUT
TRACE_D[3:2]
TRACE_D[1:0]
TRACE_SWO
Table 10-4. TPIU Signal Descriptions
Module signal Description
I/O
name
TRACECLK
Trace clock output from the ARM CoreSight debug block
O
TRACEDATA
Trace output data from the ARM CoreSight debug block used for 5-
O
pin interface
TRACEDATA Trace output data from the ARM CoreSight debug block used for
O
both 5-pin and 3-pin interfaces
JTAG_TDO/
Trace output data from the ARM CoreSight debug block over a
O
TRACE_SWO single pin
10.4.2 System Modules
Table 10-5. System Signal Descriptions
Chip signal name
NMI
Module signal
name
—
Description
Non-maskable interrupt
NOTE: Driving the NMI signal low forces a non-maskable
interrupt, if the NMI function is selected on the
corresponding pin.
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
I/O
I
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