K60P100M100SF2RM Datasheet, PDF (108/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memories and Memory Interfaces
3.5.4 SRAM Controller Configuration
This section summarizes how the module has been configured in the chip.
Cortex-M4
core
Crossbar
switch
MPU
MPU
SRAM controller
Transfers
Figure 3-27. SRAM controller configuration
Topic
System memory map
Power management
Power management
controller (PMC)
Transfers
Configuration
Table 3-38. Reference links to related information
Related module
Reference
System memory map
Power management
PMC
SRAM
ARM Cortex-M4 core
MPU
MCM
SRAM
ARM Cortex-M4 core
Memory protection unit
MCM
3.5.5 System Register File Configuration
This section summarizes how the module has been configured in the chip.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
108
Freescale Semiconductor, Inc.