K60P100M100SF2RM Datasheet, PDF (1080/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional description
LPTMRx_CNR field descriptions (continued)
Field
15–0
COUNTER
Counter Value
Description
The LPTMR Counter Register returns the current value of the LPTMR Counter.
41.4 Functional description
41.4.1 LPTMR power and reset
The LPTMR remains powered in all power modes, including low leakage modes. If the
LPTMR is not required to remain operating during a low power mode, then it should be
disabled before entering the mode.
The LPTMR is reset only on global POR or LVD. When configuring the LPTMR
registers, the control status register should be initially written with the timer disabled,
before configuring the LPTMR prescale register and compare register. The timer enable
should then be set as the last step in the initialization. This ensures the LPTMR is
configured correctly and the LPTMR counter is reset to zero following a warm reset.
41.4.2 LPTMR clocking
The LPTMR prescaler/glitch filter can be clocked by one of four clocks. The clock
source should be enabled before the LPTMR is enabled.
NOTE
The clock source selected may need to be configured to remain
enabled in low power modes, otherwise the LPTMR will not
operate during low power modes.
In pulse counter mode with the prescaler/glitch filter bypassed, the selected input source
directly clocks the LPTMR counter register and no other clock source is required. To
minimize power in this case, configure the prescaler clock source for a clock that is not
toggling.
NOTE
The clock source or pulse input source selected for the LPTMR
should not exceed the frequency f_LPTMR defined in the device
datasheet.
1080
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.