K60P100M100SF2RM Datasheet, PDF (1250/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definitions
USBx_OTGSTAT field descriptions (continued)
Field
4
Reserved
3
SESS_VLD
2
BSESSEND
1
Reserved
0
AVBUSVLD
Description
0 The LINE_STAT_CHG bit is not yet stable.
1 The LINE_STAT_CHG bit has been debounced and is stable.
This read-only field is reserved and always has the value zero.
Session valid
0 The VBUS voltage is below the B session Valid threshold
1 The VBUS voltage is above the B session Valid threshold.
B Session END
0 The VBUS voltage is above the B session End threshold.
1 The VBUS voltage is below the B session End threshold.
This read-only field is reserved and always has the value zero.
A VBUS Valid
0 The VBUS voltage is below the A VBUS Valid threshold.
1 The VBUS voltage is above the A VBUS Valid threshold.
45.4.8 OTG Control Register (USBx_OTGCTL)
The OTG Control Register controls the operation of VBUS and Data Line termination
resistors.
Addresses: USB0_OTGCTL is 4007_2000h base + 1Ch offset = 4007_201Ch
Bit
7
6
5
4
3
2
Read
0
0
DPHIGH
DPLOW DMLOW
OTGEN
Write
Reset
0
0
0
0
0
0
USBx_OTGCTL field descriptions
Field
7
DPHIGH
6
Reserved
5
DPLOW
D+ Data Line pullup resistor enable
Description
0 D+ pullup resistor is not enabled
1 D+ pullup resistor is enabled
This read-only field is reserved and always has the value zero.
D+ Data Line pull-down resistor enable
This bit should always be enabled together with bit 4 (DMLOW)
Table continues on the next page...
1
0
0
0
0
1250
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.