K60P100M100SF2RM Datasheet, PDF (1127/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 44
10/100-Mbps Ethernet MAC (ENET)
44.1 Introduction
NOTE
For the chip-specific implementation details of this module's
instances see the chip configuration chapter.
The MAC-NET core, in conjunction with a 10/100 MAC, implements layer 3 network
acceleration functions. These functions are designed to accelerate the processing of
various common networking protocols, such as IP, TCP, UDP and ICMP, providing wire
speed services to client applications.
44.1.1 Overview
The core implements a dual speed 10/100 Mbps Ethernet MAC compliant with the
IEEE802.3-2002 standard. The MAC layer provides compatibility with half- or full-
duplex 10/100Mbps Ethernet LANs.
The MAC operation is fully programmable and can be used in NIC (Network Interface
Card), bridging, or switching applications. The core implements the remote network
monitoring (RMON) counters according to IETF RFC 2819.
The core also implements a hardware acceleration block to optimize the performance of
network controllers providing IP and TCP, UDP, ICMP protocol services. The
acceleration block performs critical functions in hardware, which are typically
implemented with large software overhead.
The core implements programmable embedded FIFOs that can provide buffering on the
receive path for loss-less flow control
Advanced power management features are available with magic packet detection and
programmable power-down modes.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1127