K60P100M100SF2RM Datasheet, PDF (1377/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 48 CAN (FlexCAN)
Whenever CAN bit is used as a measure of duration (e.g. MCR[FRZACK] and
MCR[LPMACK]), the number of peripheral clocks in one CAN bit can be calculated as:
NCCP =
fSYS _{x [1 + (PSEG1 + 1) + (PSEG2 + 1) + (PROPSEG + 1)] x (PRESDIV + 1)}
fCANCLK
where:
• NCCP is the number of peripheral clocks in one CAN bit;
• f_CANCLK is the Protocol Engine (PE) Clock (see Figure "CAN Engine Clocking
Scheme"), in Hz;
• f_SYS is the frequency of operation of the system (CHI) clock, in Hz;
• PSEG1 is the value in CTRL1[PSEG1] field;
• PSEG2 is the value in CTRL1[PSEG2] field;
• PROPSEG is the value in CTRL1[PROPSEG] field;
• PRESDIV is the value in CTRL1[PRESDIV] field.
For example, 180 CAN bits = 180 x NCCP peripheral clock periods.
Table 48-118. Time Segment Syntax
Syntax
SYNC_SEG
Transmit Point
Sample Point
Description
System expects transitions to occur on the bus during this period.
A node in transmit mode transfers a new value to the CAN bus at this point.
A node samples the bus at this point. If the three samples per bit option is selected, then this point
marks the position of the third sample.
The following table gives an overview of the CAN compliant segment settings and the
related parameter values.
Table 48-119. CAN Standard Compliant Bit Time Segment Settings
Time Segment 1
5 .. 10
4 .. 11
5 .. 12
6 .. 13
7 .. 14
8 .. 15
9 .. 16
Time Segment 2
2
3
4
5
6
7
8
Re-synchronization Jump Width
1 .. 2
1 .. 3
1 .. 4
1 .. 4
1 .. 4
1 .. 4
1 .. 4
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1377