K60P100M100SF2RM Datasheet, PDF (1750/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory map and register definition
GPIO memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access
Reset value
reads
zero)
400F_F010 Port Data Input Register (GPIOA_PDIR)
32
R
0000_0000h
400F_F014 Port Data Direction Register (GPIOA_PDDR)
32
R/W 0000_0000h
400F_F040 Port Data Output Register (GPIOB_PDOR)
400F_F044 Port Set Output Register (GPIOB_PSOR)
400F_F048 Port Clear Output Register (GPIOB_PCOR)
400F_F04C Port Toggle Output Register (GPIOB_PTOR)
400F_F050 Port Data Input Register (GPIOB_PDIR)
32
R/W 0000_0000h
W
32
(always
reads
0000_0000h
zero)
W
32
(always
reads
0000_0000h
zero)
W
32
(always
reads
0000_0000h
zero)
32
R
0000_0000h
400F_F054 Port Data Direction Register (GPIOB_PDDR)
32
R/W 0000_0000h
400F_F080 Port Data Output Register (GPIOC_PDOR)
400F_F084 Port Set Output Register (GPIOC_PSOR)
400F_F088 Port Clear Output Register (GPIOC_PCOR)
400F_F08C Port Toggle Output Register (GPIOC_PTOR)
400F_F090 Port Data Input Register (GPIOC_PDIR)
32
R/W 0000_0000h
W
32
(always
reads
0000_0000h
zero)
W
32
(always
reads
0000_0000h
zero)
W
32
(always
reads
0000_0000h
zero)
32
R
0000_0000h
400F_F094 Port Data Direction Register (GPIOC_PDDR)
32
R/W 0000_0000h
400F_F0C0 Port Data Output Register (GPIOD_PDOR)
32
Table continues on the next page...
R/W 0000_0000h
Section/
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54.2.1/
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54.2.4/
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54.2.1/
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54.2.5/
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.