K60P100M100SF2RM Datasheet, PDF (729/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 29 External Bus Interface (FlexBus)
FB_CLK
FB_A[Y]
Address
FB_D[X]
Address
Data
FB_RW
FB_TS
FB_ALE
AA=1
FB_CSn
AA=0
FB_OEn
FB_BE/BWEn
FB_TA
AA=1
AA=0
FB_TSIZ[1:0]
TSIZ
Figure 29-43. Write Cycle with Two-Clock Address Hold (No Wait States)
The following figure shows a bus cycle using address setup, wait states, and address hold.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
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