K60P100M100SF2RM Datasheet, PDF (914/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map and Register Definition
PDBx_MOD field descriptions
Field
31–16
Reserved
15–0
MOD
Description
This read-only field is reserved and always has the value zero.
PDB Modulus.
These bits specify the period of the counter. When the counter reaches this value, it will be reset back to
zero. If the PDB is in Continuous mode, the count begins anew. Reading these bits returns the value of
internal register that is effective for the current cycle of PDB.
38.3.3 Counter Register (PDBx_CNT)
Addresses: PDB0_CNT is 4003_6000h base + 8h offset = 4003_6008h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
CNT
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PDBx_CNT field descriptions
Field
31–16
Reserved
15–0
CNT
Description
This read-only field is reserved and always has the value zero.
PDB Counter
These read-only bits contain the current value of the counter.
38.3.4 Interrupt Delay Register (PDBx_IDLY)
Addresses: PDB0_IDLY is 4003_6000h base + Ch offset = 4003_600Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
W
IDLY
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
PDBx_IDLY field descriptions
Field
31–16
Reserved
15–0
IDLY
Description
This read-only field is reserved and always has the value zero.
PDB Interrupt Delay
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
914
Freescale Semiconductor, Inc.