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K60P100M100SF2RM Datasheet, PDF (1479/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual
Signal
CTS
RTS
RXD
TXD
Chapter 51 Universal Asynchronous Receiver/Transmitter (UART)
Table 51-2. UART—Detailed signal descriptions
I/O
Description
I
Clear to send. Indicates whether the UART can start to transmit data when flow control is
enabled.
State meaning Asserted—Data transmission can start.
Negated—Data transmission can not start.
Timing
Assertion—When transmitting device's RTS asserts.
Negation—When transmitting device's RTS deasserts.
O
Request to send. When driven by the receiver, indicates whether the UART is ready to
receive data. When driven by the transmitter, can enable an external transceiver during
transmission.
State
Meaning
Asserted—When driven by the receiver, ready to receive data. When
driven by the transmitter, enable the external transmitter.
Negated—When driven by the receiver, not ready to receive data. When
driven by the transmitter, disable the external transmitter.
Timing
Assertion—Can occur at any time; can assert asynchronously to the other
input signals.
Negation—Can occur at any time; can deassert asynchronously to the
other input signals.
I
Receive data. Serial data input to receiver.
State meaning Whether RXD is interpreted as a '1' or '0' depends on the bit encoding
method along with other configuration settings.
Timing
Sampled at a frequency determined by the module clock divided by the
baud rate.
O
Transmit data. Serial data output from transmitter.
State meaning Whether TXD is interpreted as a '1' or '0' depends on the bit encoding
method along with other configuration settings.
Timing
Driven at the beginning or within a bit time according to the bit encoding
method along with other configuration settings. Otherwise, transmissions
are independent of reception timing.
51.3 Memory map and registers
This section provides a detailed description of all memory and registers.
Accessing reserved addresses within the memory map will result in a transfer error. None
of the contents of the implemented addresses will be modified as a result of that access.
Only byte accesses are supported.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1479