K60P100M100SF2RM Datasheet, PDF (449/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
16
ECX
15–8
Reserved
7
EMLM
6
CLM
5
HALT
4
HOE
3
Reserved
2
ERCA
1
EDBG
Chapter 21 Direct Memory Access Controller (eDMA)
DMA_CR field descriptions (continued)
Description
0 Normal operation
1 Cancel the remaining data transfer. Stop the executing channel and force the minor loop to finish. The
cancel takes effect after the last write of the current read/write sequence. The CX bit clears itself after
the cancel has been honored. This cancel retires the channel normally as if the minor loop was
completed.
Error Cancel Transfer
0 Normal operation
1 Cancel the remaining data transfer in the same fashion as the CX bit. Stop the executing channel and
force the minor loop to finish. The cancel takes effect after the last write of the current read/write
sequence. The ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer,
ECX treats the cancel as an error condition, thus updating the ES register and generating an optional
error interrupt.
This read-only field is reserved and always has the value zero.
Enable Minor Loop Mapping
0 Disabled. TCDn.word2 is defined as a 32-bit NBYTES field.
1 Enabled. TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES
field. The individual enable fields allow the minor loop offset to be applied to the source address, the
destination address, or both. The NBYTES field is reduced when either offset is enabled.
Continuous Link Mode
0 A minor loop channel link made to itself goes through channel arbitration before being activated
again.
1 A minor loop channel link made to itself does not go through channel arbitration before being
activated again. Upon minor loop completion, the channel activates again if that channel has a minor
loop channel link enabled and the link channel is itself. This effectively applies the minor loop offsets
and restarts the next minor loop.
Halt DMA Operations
0 Normal operation
1 Stall the start of any new channels. Executing channels are allowed to complete. Channel execution
resumes when this bit is cleared.
Halt On Error
0 Normal operation
1 Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT
bit is cleared.
This read-only field is reserved and always has the value zero.
Enable Round Robin Channel Arbitration
0 Fixed priority arbitration is used for channel selection.
1 Round robin arbitration is used for channel selection.
Enable Debug
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
449