K60P100M100SF2RM Datasheet, PDF (457/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 21 Direct Memory Access Controller (eDMA)
21.3.6 Set Enable Error Interrupt Register (DMA_SEEI)
The SEEI provides a simple memory-mapped mechanism to set a given bit in the EEI to
enable the error interrupt for a given channel. The data value on a register write causes
the corresponding bit in the EEI to be set. Setting the SAEE bit provides a global set
function, forcing the entire EEI contents to be set. If the NOP bit is set, the command is
ignored. This allows you to write multiple-byte registers as a 32-bit word. Reads of this
register return all zeroes.
Address: DMA_SEEI is 4000_8000h base + 19h offset = 4000_8019h
Bit
7
6
5
4
3
2
1
0
Read
0
0
0
Write
NOP
SAEE
0
SEEI
Reset
0
0
0
0
0
0
0
0
DMA_SEEI field descriptions
Field
7
NOP
6
SAEE
5–4
Reserved
3–0
SEEI
Description
0 Normal operation
1 No operation, ignore the other bits in this register
Sets All Enable Error Interrupts
0 Set only the EEI bit specified in the SEEI field.
1 Sets all bits in EEI
This field is reserved.
Set Enable Error Interrupt
Sets the corresponding bit in EEI
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
457