K60P100M100SF2RM Datasheet, PDF (947/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
31–16
Reserved
15–0
VAL
FTMx_CnV field descriptions
Description
This read-only field is reserved and always has the value zero.
Chapter 39 FlexTimer (FTM)
Channel Value
Captured FTM counter value of the input modes or the match value for the output modes
39.3.8 Counter Initial Value (FTMx_CNTIN)
The Counter Initial Value register contains the initial value for the FTM counter.
Writing to the CNTIN register latches the value into a buffer. The CNTIN register is
updated with the value of its write buffer according to Registers Updated from Write
Buffers.
The first time that the FTM clock is selected (first write to change the CLKS bits to a
non-zero value), the FTM counter starts with the value 0x0000. To avoid this behavior,
before the first write to select the FTM clock, write the new value to the the CNTIN
register and then initialize the FTM counter (write any value to the CNT register).
Addresses: FTM0_CNTIN is 4003_8000h base + 4Ch offset = 4003_804Ch
FTM1_CNTIN is 4003_9000h base + 4Ch offset = 4003_904Ch
FTM2_CNTIN is 400B_8000h base + 4Ch offset = 400B_804Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
Reserved
INIT
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
FTMx_CNTIN field descriptions
Field
31–16
Reserved
15–0
INIT
This field is reserved.
Initial Value of the FTM Counter
Description
39.3.9 Capture and Compare Status (FTMx_STATUS)
The STATUS register contains a copy of the status flag CHnF bit (in CnSC) for each
FTM channel for software convenience.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
947