K60P100M100SF2RM Datasheet, PDF (323/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 13 Mode Controller
If the MCU is configured for a disallowed power mode, the MCU remains in its current
power mode. For example, if in normal run (RUNM = 00, AVLP = 0) an attempt to enter
VLPR using PMCTRL[RUNM] is blocked and the RUNM bits remain 00b indicating
MCU is still in normal run mode.
PMPROT is write once after any reset. This write to PMPROT clears LPLLSM, which
provides protection after wakeup from low power or low leakage modes. The state of
LPLLSM prior to clearing due to update of PMPROT indicates which power mode was
exited and should be used by initialization software for proper power mode recovery.
NOTE
The reset value of this register depends on the reset type:
• Low-leakage wake-up (LLS exit via RESET pin or any exit
from VLLS) — bits 4, 2-0 unaffected
• Other reset — 0x00
Address: MC_PMPROT is 4007_E000h base + 2h offset = 4007_E002h
Bit
Read
Write
Reset
7
6
0
0
0
5
AVLP
0
4
ALLS
0
3
2
1
0
0
AVLLS3
AVLLS2
AVLLS1
0
0
0
0
MC_PMPROT field descriptions
Field
7–6
Reserved
5
AVLP
Description
This read-only field is reserved and always has the value zero.
Allow very low power modes
Provided the appropriate control bits are set up in PMCTRL, this write-once bit allows the MCU to enter
the very low power modes: VLPR, VLPW, and VLPS.
4
ALLS
0 VLPR, VLPW, and VLPS are not allowed
1 VLPR, VLPW, and VLPS are allowed
Allow low leakage stop mode
This write once bit allows the MCU to enter low leakage stop mode (LLS) provided the appropriate control
bits are set up in PMCTRL.
3
Reserved
2
AVLLS3
0 LLS is not allowed
1 LLS is allowed
This read-only field is reserved and always has the value zero.
Allow Very Low Leakage Stop 3 Mode
This write once bit allows the MCU to enter very low leakage stop 3 mode (VLLS3) provided the
appropriate control bits are set up in PMCTRL.
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
323