K60P100M100SF2RM Datasheet, PDF (368/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map / Register Definition
AXBS_PRSn field descriptions (continued)
Field
7
Reserved
6–4
M1
3
Reserved
2–0
M0
Description
This read-only field is reserved and always has the value zero.
Master 1 priority. Sets the arbitration priority for this port on the associated slave port.
000 This master has level 1, or highest, priority when accessing the slave port.
001 This master has level 2 priority when accessing the slave port.
010 This master has level 3 priority when accessing the slave port.
011 This master has level 4 priority when accessing the slave port.
100 This master has level 5 priority when accessing the slave port.
101 This master has level 6 priority when accessing the slave port.
110 This master has level 7 priority when accessing the slave port.
111 This master has level 8, or lowest, priority when accessing the slave port.
This read-only field is reserved and always has the value zero.
Master 0 priority. Sets the arbitration priority for this port on the associated slave port.
000 This master has level 1, or highest, priority when accessing the slave port.
001 This master has level 2 priority when accessing the slave port.
010 This master has level 3 priority when accessing the slave port.
011 This master has level 4 priority when accessing the slave port.
100 This master has level 5 priority when accessing the slave port.
101 This master has level 6 priority when accessing the slave port.
110 This master has level 7 priority when accessing the slave port.
111 This master has level 8, or lowest, priority when accessing the slave port.
17.2.2 Control Register (AXBS_CRSn)
These registers control several features of each slave port and must be accessed using 32-
bit accesses. After CRSn[RO] is set, the CRSn can only be read; attempts to write to it
have no effect and result in an error response.
Addresses: AXBS_CRS0 is 4000_4000h base + 10h offset = 4000_4010h
AXBS_CRS1 is 4000_4000h base + 110h offset = 4000_4110h
AXBS_CRS2 is 4000_4000h base + 210h offset = 4000_4210h
AXBS_CRS3 is 4000_4000h base + 310h offset = 4000_4310h
AXBS_CRS4 is 4000_4000h base + 410h offset = 4000_4410h
AXBS_CRS5 is 4000_4000h base + 510h offset = 4000_4510h
AXBS_CRS6 is 4000_4000h base + 610h offset = 4000_4610h
AXBS_CRS7 is 4000_4000h base + 710h offset = 4000_4710h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
0
0
ARB
PARK
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
368
Freescale Semiconductor, Inc.