K60P100M100SF2RM Datasheet, PDF (1036/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional Description
Note
It is expected that the polarity control be used only in combine
mode.
39.4.18 Initialization
The initialization forces the CHnOI bit value to the channel (n) output when a one is
written to the INIT bit.
The initialization depends on COMP and DTEN bits. The following table shows the
values that channels (n) and (n+1) are forced by initialization when the COMP and
DTEN bits are zero.
Table 39-245. Initialization Behavior when (COMP = 0 and DTEN = 0)
CH(n)OI
0
0
1
1
CH(n+1)OI
0
1
0
1
Channel (n) Output
is forced to zero
is forced to zero
is forced to one
is forced to one
Channel (n+1) Output
is forced to zero
is forced to one
is forced to zero
is forced to one
The following table shows the values that channels (n) and (n+1) are forced by
initialization when (COMP = 1) or (DTEN = 1).
Table 39-246. Initialization Behavior when (COMP = 1 or DTEN = 1)
CH(n)OI
0
1
CH(n+1)OI
X
X
Channel (n) Output
is forced to zero
is forced to one
Channel (n+1) Output
is forced to one
is forced to zero
Note
It is expected that the initialization feature be used only in
combine mode and with disabled FTM counter (see the
description of the CLKS field in the Status and Control
register).
39.4.19 Features Priority
The following figure shows the priority of the features used at the generation of channels
(n) and (n+1) outputs signals.
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.