K60P100M100SF2RM Datasheet, PDF (401/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 19 Peripheral Bridge (AIPS-Lite)
AIPS memory map (continued)
Absolute
address
(hex)
Register name
4000_0040 Peripheral Access Control Register (AIPS0_PACRE)
4000_0044 Peripheral Access Control Register (AIPS0_PACRF)
4000_0048 Peripheral Access Control Register (AIPS0_PACRG)
4000_004C Peripheral Access Control Register (AIPS0_PACRH)
4000_0050 Peripheral Access Control Register (AIPS0_PACRI)
4000_0054 Peripheral Access Control Register (AIPS0_PACRJ)
4000_0058 Peripheral Access Control Register (AIPS0_PACRK)
4000_005C Peripheral Access Control Register (AIPS0_PACRL)
4000_0060 Peripheral Access Control Register (AIPS0_PACRM)
4000_0064 Peripheral Access Control Register (AIPS0_PACRN)
4000_0068 Peripheral Access Control Register (AIPS0_PACRO)
4000_006C Peripheral Access Control Register (AIPS0_PACRP)
4008_0000 Master Privilege Register A (AIPS1_MPRA)
4008_0020 Peripheral Access Control Register (AIPS1_PACRA)
4008_0024 Peripheral Access Control Register (AIPS1_PACRB)
4008_0028 Peripheral Access Control Register (AIPS1_PACRC)
4008_002C Peripheral Access Control Register (AIPS1_PACRD)
4008_0040 Peripheral Access Control Register (AIPS1_PACRE)
4008_0044 Peripheral Access Control Register (AIPS1_PACRF)
4008_0048 Peripheral Access Control Register (AIPS1_PACRG)
4008_004C Peripheral Access Control Register (AIPS1_PACRH)
4008_0050 Peripheral Access Control Register (AIPS1_PACRI)
4008_0054 Peripheral Access Control Register (AIPS1_PACRJ)
4008_0058 Peripheral Access Control Register (AIPS1_PACRK)
4008_005C Peripheral Access Control Register (AIPS1_PACRL)
4008_0060 Peripheral Access Control Register (AIPS1_PACRM)
4008_0064 Peripheral Access Control Register (AIPS1_PACRN)
4008_0068 Peripheral Access Control Register (AIPS1_PACRO)
4008_006C Peripheral Access Control Register (AIPS1_PACRP)
Width
(in bits)
Access
Reset value
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19.2.1 Master Privilege Register A (AIPSx_MPRA)
The MPRA register specifies identical 4-bit fields defining the access-privilege level
associated with a bus master in the device to the various peripherals. The register
provides one field per bus master.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
401