English
Language : 

K60P100M100SF2RM Datasheet, PDF (1378/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual
Functional Description
Note
It is the user's responsibility to ensure the bit time settings are in
compliance with the CAN standard. For bit time calculations,
use an IPT (Information Processing Time) of 2, which is the
value implemented in the FlexCAN module.
48.4.8.5 Arbitration and Matching Timing
During normal reception and transmission of frames, the matching, arbitration, move-in
and move-out processes are executed during certain time windows inside the CAN frame,
as shown in the following figures.
DLC (4) DATA and/or CRC (15 to 79)
EOF (7)
Start Move
(bit 2)
Interm
Matching Window (26 to 90 bits)
Move-in
Window
Figure 48-106. Matching and Move-In Time Windows
CRC (15)
Start Arbitration Arb Start Move
(delayed by TASD) Process (bit 1)
EOF (7)
Interm
Arbitration Window (25 bits)
Move-out
Window
Figure 48-107. Arbitration and Move-Out Time Windows
0
1
2
3
BusOff
...
123 124 125 126 ...
128
ECR[TXERRCNT]
(Transmit Error Counter)
TASD Arb Move-out
Count Process Window
Figure 48-108. Arbitration at the end of Bus Off and Move-Out Time Windows
NOTE
The matching and arbitration timing shown in the preceding
figures do not take into account the delay caused by the
1378
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.