K60P100M100SF2RM Datasheet, PDF (128/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Timers
The voltage reference can provide a reference voltage to external peripherals or a
reference to analog peripherals, such as the ADC, DAC, or CMP.
NOTE
For either an internal or external reference if the VREF_OUT
functionality is being used, VREF_OUT signal must be
connected to an output load capacitor. Refer the device data
sheet for more details.
3.8 Timers
3.8.1 PDB Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Peripheral bus
controller 0
Register
access
Transfers
Other peripherals
PDB
Module signals
Topic
Full description
System memory map
Clocking
Power management
Signal multiplexing
Figure 3-43. PDB configuration
Table 3-51. Reference links to related information
Related module
PDB
Port control
Reference
PDB
System memory map
Clock distribution
Power management
Signal multiplexing
3.8.1.1 PDB Instantiation
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
128
Freescale Semiconductor, Inc.