K60P100M100SF2RM Datasheet, PDF (890/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definition
DACx_SR field descriptions (continued)
Field
2
DACBFWMF
1
DACBFRPTF
0
DACBFRPBF
DAC buffer watermark flag
Description
0 The DAC buffer read pointer has not reached the watermark level.
1 The DAC buffer read pointer has reached the watermark level.
DAC buffer read pointer top position flag
0 The DAC buffer read pointer is not zero.
1 The DAC buffer read pointer is zero.
DAC buffer read pointer bottom position flag
0 The DAC buffer read pointer is not equal to the DACBFUP.
1 The DAC buffer read pointer is equal to the DACBFUP.
36.4.4 DAC Control Register (DACx_C0)
Addresses: DAC0_C0 is 400C_C000h base + 21h offset = 400C_C021h
Bit
Read
Write
Reset
7
DACEN
0
6
DACRFS
0
5
4
0
DACTRGSEL
DACSWTRG
0
0
3
LPEN
0
2
1
0
DACBWIEN DACBTIEN DACBBIEN
0
0
0
DACx_C0 field descriptions
Field
7
DACEN
DAC enable
Description
The DACEN bit starts the Programmable Reference Generator operation.
6
DACRFS
5
DACTRGSEL
4
DACSWTRG
0 The DAC system is disabled.
1 The DAC system is enabled.
DAC Reference Select
0 The DAC selets DACREF_1 as the reference voltage.
1 The DAC selets DACREF_2 as the reference voltage.
DAC trigger select
0 The DAC hardware trigger is selected.
1 The DAC software trigger is selected.
DAC software trigger
Active high. This is a write-only bit, read it always be 0. If DAC software trigger is selected and buffer
enabled, write 1 to this bit will advance the buffer read pointer once.
0 The DAC soft trigger is not valid.
1 The DAC soft trigger is valid.
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
890
Freescale Semiconductor, Inc.