K60P100M100SF2RM Datasheet, PDF (925/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 38 Programmable Delay Block (PDB)
CHnDLY1
CHnDLY0
PDB Counter
SC[LDOK]
Ch n pre-trigger 0
Ch n pre-trigger 1
Figure 38-57. Registers Update with SC[LDMOD] = x1
38.4.6 Interrupts
PDB can generate two interrupts, PDB interrupt and PDB sequence error interrupt. The
following table summarizes the interrupts.
Table 38-57. PDB Interrupt Summary
Interrupt
PDB Interrupt
PDB Sequence Error Interrupt
Flags
SC[PDBIF]
CHnS[ERRm]
Enable Bit
SC[PDBIE] = 1 and
SC[DMAEN] = 0
SC[PDBEIE] = 1
38.4.7 DMA
If SC[DMAEN] is set, PDB can generate DMA transfer request when SC[PDBIF] is set.
When DMA is enabled, the PDB interrupt will not be issued.
38.5 Application Information
38.5.1 Impact of Using the Prescaler and Multiplication Factor on
Timing Resolution
Use of prescaler and multiplication factor greater than 1 limits the count/delay accuracy
in terms of peripheral clock cycles (to the modulus of the prescaler X multiplication
factor). If the multiplication factor is set to 1 and the prescaler is set to 2 then the only
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
925