K60P100M100SF2RM Datasheet, PDF (308/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Introduction
Wait
Stop
Any reset
VLPW
4
5
1
VLPR
Run
2
8
LLS
3
7
10
6
VLPS
VLLS
3, 2, 1
11
9
Figure 13-1. Power Mode State Diagram
The following table defines triggers for the various state transitions shown in the previous
figure.
Table 13-2. Power mode transition triggers
Transition #
1
2
From
Run
Wait
Run
STOP
To
Wait
Run
STOP
Run
Trigger Conditions
Sleep-now or sleep-on-exit modes entered with SLEEPDEEP
clear, controlled in System Control Register in ARM core.
Interrupt or Reset
Sleep-now or sleep-on-exit modes entered with SLEEPDEEP
set, controlled in System Control Register in ARM core
Interrupt or Reset
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
308
Freescale Semiconductor, Inc.