K60P100M100SF2RM Datasheet, PDF (1661/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 52 Secured digital host controller (SDHC)
52.6.5.2 ADMA2 operation
Set_adma2_descriptor
{
if (to start data transfer) {
// Make sure the address is 32-bit boundary (lower 2-bit are always '00').
Set higher 32-bit of descriptor for this data transfer initial address;
Set [31:16] bits data length (byte unit);
Set Act bits to '10';
}
else if (to fetch descriptor at non-continuous address) {
Set Act bits to '11';
// Make sure the address is 32-bit boundary (lower 2-bit are always set to '00').
Set higher 32-bit of descriptor for the next descriptor address;
}
else { // other types of descriptor
Set Act bits accordingly
}
if (this descriptor is the last one) {
Set 'End' bit '1';
}
if (to generate interrupt for this descriptor) {
Set 'Int' bit '1';
}
Set the 'Valid' bit to '1';
}
52.6.6 Fast boot operation
This section discusses fast boot operations.
52.6.6.1 Normal fast boot flow
1. Software need to configure SYSCTL[INITA] to make sure 74 card clocks are
finished.
2. Software need to configure MMCBOOT[BOOTEN] to 1, and
MMCBOOT[BOOTMODE] to 0, and MMCBOOT[BOOTACK] to select the ack
mode or not. If need to send through DMA mode, need to configure
MMCBOOT[AUTOSABGEN] to enable automatically stop at block gap feature.
And need to configure MMCBOOT[DTOCVACK] to select the ack timeout value
according to the sd clk frequence.
3. Software then need to configure BLKATTR register to set block size/no.
4. Software need to configure PROCTL[DTW].
5. Software need to configure CMDARG to set argument if needed(no need in normal
fast boot).
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1661