K60P100M100SF2RM Datasheet, PDF (109/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Peripheral
bridge 0
Register
access
Chapter 3 Chip Configuration
Register file
Topic
Full description
System memory map
Clocking
Power management
Figure 3-28. System Register file configuration
Table 3-39. Reference links to related information
Related module
Register file
Reference
Register file
System memory map
Clock distribution
Power management
3.5.5.1 System Register file
This device includes a 32-byte register file that is powered in all power modes.
Also, it retains contents during low-voltage detect (LVD) events and is only reset during
a power-on reset.
3.5.6 VBAT Register File Configuration
This section summarizes how the module has been configured in the chip.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
109