English
Language : 

K60P100M100SF2RM Datasheet, PDF (228/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual
TPIU
multiple sequential runs by executing code until the ETB is almost full, and halting or
executing an interrupt handler to allow the buffer to be emptied, and then continuing
executing code. The target halts or executes an interrupt handler when the buffer is
almost full to empty the data and then the debugger runs the target again.
9.11.2 ETB Counter Control
The ETB packet counter is controlled by the ETB counter control register, ETB reload
register, and ETB counter value register implemented in the Miscellaneous Control
Module (MCM) accessible via the Private Peripheral Bus. Via the ETB counter control
register the ETB control logic can be configured to cause an MCM Alert Interrupt, an
NMI Interrupt, or cause a Debug halt when the down counter reaches 0. Other features of
the ETB control logic include:
• Down counter to count as many as 512 x 32-bit packets.
• Reload request transfers reload value to counter.
• ATB valid and ready signals used to form counter decrement.
• The counter disarms itself when the count reaches 0.
9.12 TPIU
The TPIU acts as a bridge between the on-chip trace data from the Embedded Trace
Macrocell (ETM) and the Instrumentation Trace Macrocell (ITM), with separate IDs, to a
data stream, encapsulating IDs where required, that is then captured by a Trace Port
Analyzer (TPA). The TPIU is specially designed for low-cost debug.
9.13 DWT
The DWT is a unit that performs the following debug functionality:
• It contains four comparators that you can configure as a hardware watchpoint, an
ETM trigger, a PC sampler event trigger, or a data address sampler event trigger. The
first comparator, DWT_COMP0, can also compare against the clock cycle counter,
CYCCNT. The second comparator, DWT_COMP1, can also be used as a data
comparator.
• The DWT contains counters for:
• Clock cycles (CYCCNT)
• Folded instructions
• Load store unit (LSU) operations
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
228
Freescale Semiconductor, Inc.