K60P100M100SF2RM Datasheet, PDF (209/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Modules
FlexMemory³
Register files⁵
FlexBus
EzPort
USB FS/LS
USB DCD
USB Voltage
Regulator
Ethernet
UART
SPI
I²C
CAN
I²S
SDHC
CRC
RNG
FTM
PIT
PDB
LPTMR
RTC - 32kHz
OSC⁵
CMT
16-bit ADC
CMP⁷
6-bit DAC
Chapter 7 Power Management
Table 7-2. Module operation in low power modes (continued)
Stop
low power
VLPR
low power⁴
VLPW
low power
VLPS
low power
powered
static
disabled
static
static
optional
powered
powered
powered
FF
FF
static
disabled
disabled
disabled
Communication interfaces
static
static
static
FF
FF
static
optional
optional
optional
LLS
low power
powered
static
disabled
VLLSx
low power in
VLLS3, OFF in
VLLS2 and
VLLS1
powered
OFF
disabled
static
static
optional
OFF
OFF
optional
wakeup
static, wakeup
on edge
static
static, address
match wakeup
wakeup
FF with external
clock⁶
wakeup
static
125 kbps
1 Mbps
100 kbps
256 kbps
FF
FF
static
FF
static
FF
static
FF
static
FF
static
FF
FF
FF
FF
FF
static
125 kbps
1 Mbps
100 kbps
256 kbps
FF
FF
Security
FF
static
Timers
FF
FF
FF
FF
FF
static
static, wakeup
on edge
static
static, address
match wakeup
wakeup
FF with external
clock⁶
wakeup
static
static
static
static
static
FF
FF
static
static
static
static
static
static
static
static
static
static
static
static
FF
FF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
FF
FF
static
ADC internal
clock only
HS or LS
compare
static
FF
FF
static
Analog
FF
FF
ADC internal
clock only
FF
FF
HS or LS
compare
FF
FF
static
Table continues on the next page...
static
static
LS compare
static
OFF
OFF
LS compare
static
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
209