K60P100M100SF2RM Datasheet, PDF (1094/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definition
42.6.6 CMT Modulator Status and Control Register (CMT_MSC)
The MSC register contains the modulator and carrier generator enable (MCGEN), end of
cycle interrupt enable (EOCIE), FSK mode select (FSK), baseband enable (BASE),
extended space (EXSPC), prescaler (CMTDIV) bits, and the end of cycle (EOCF) status
bit.
Address: CMT_MSC is 4006_2000h base + 5h offset = 4006_2005h
Bit
Read
Write
Reset
7
EOCF
0
6
5
CMTDIV
0
0
4
EXSPC
0
3
BASE
0
2
FSK
0
1
EOCIE
0
0
MCGEN
0
CMT_MSC field descriptions
Field
7
EOCF
End Of Cycle Status Flag
Description
The EOCF bit is set when:
• The modulator is not currently active and the MCGEN bit is set to begin the initial CMT
transmission.
• At the end of each modulation cycle while the MCGEN bit is set. This is recognized when a match
occurs between the contents of the space period register and the down counter. At this time, the
counter is initialized with the (possibly new) contents of the mark period buffer, CMT_CMD1 and
CMT_CMD2, and the space period register is loaded with the (possibly new) contents of the space
period buffer, CMT_CMD3 and CMT_CMD4.
This flag is cleared by a read of the MSC register followed by an access of CMD2 or CMD4 or by the
DMA transfer.
6–5
CMTDIV
0 No end of modulation cycle occurrence since flag last cleared
1 _{End of modulator cycle has occurred}
CMT Clock Divide Prescaler
The Secondary Prescaler causes the CMT to be clocked at the IF signal frequency, or the IF frequency
divided by 2 ,4, or 8. Since these bits are not double buffered, they should not be changed during a
transmission.
4
EXSPC
00 IF ÷ 1
01 IF ÷ 2
10 IF ÷ 4
11 IF ÷ 8
Extended Space Enable
The EXSPC bit enables extended space operation.
0 Extended space disabled
1 _{Extended space enabled}
Table continues on the next page...
1094
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.