K60P100M100SF2RM Datasheet, PDF (1253/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
5
RESUMEEN
4
SLEEPEN
3
TOKDNEEN
2
SOFTOKEN
1
ERROREN
0
USBRSTEN
Chapter 45 Universal Serial Bus OTG Controller (USBOTG)
USBx_INTEN field descriptions (continued)
RESUME Interrupt Enable
Description
0 The RESUME interrupt is not enabled.
1 The RESUME interrupt is enabled.
SLEEP Interrupt Enable
0 The SLEEP interrupt is not enabled.
1 The SLEEP interrupt is enabled.
TOKDNE Interrupt Enable
0 The TOKDNE interrupt is not enabled.
1 The TOKDNE interrupt is enabled.
SOFTOK Interrupt Enable
0 The SOFTOK interrupt is not enabled.
1 The SOFTOK interrupt is enabled.
ERROR Interrupt Enable
0 The ERROR interrupt is not enabled.
1 The ERROR interrupt is enabled.
USBRST Interrupt Enable
0 The USBRST interrupt is not enabled.
1 The USBRST interrupt is enabled.
45.4.11 Error Interrupt Status Register (USBx_ERRSTAT)
The Error Interrupt Status Register contains enable bits for each of the error sources
within the USB Module. Each of these bits are qualified with their respective error enable
bits. All bits of this Register are logically OR'd together and the result placed in the
ERROR bit of the ISTAT register. After an interrupt bit has been set it may only be
cleared by writing a one to the respective interrupt bit. Each bit is set as soon as the error
conditions is detected. Therefore, the interrupt does not typically correspond with the end
of a token being processed. This register contains the value of 0x00 after a reset.
Addresses: USB0_ERRSTAT is 4007_2000h base + 88h offset = 4007_2088h
Bit
7
6
5
4
3
Read BTSERR
0
DMAERR BTOERR
DFN8
Write
w1c
w1c
w1c
w1c
Reset
0
0
0
0
0
2
CRC16
w1c
0
1
CRC5EOF
w1c
0
0
PIDERR
w1c
0
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1253