K60P100M100SF2RM Datasheet, PDF (1410/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definition
SPIx_SR field descriptions (continued)
Field
21
Reserved
20
Reserved
19
RFOF
Description
This read-only field is reserved and always has the value zero.
This read-only field is reserved and always has the value zero.
Receive FIFO Overflow Flag
Indicates an overflow condition in the RX FIFO. The bit is set when the RX FIFO and shift register are full
and a transfer is initiated. The bit remains set until it is cleared by writing a 1 to it.
18
Reserved
17
RFDF
0 No Rx FIFO overflow.
1 Rx FIFO overflow has occurred.
This read-only field is reserved and always has the value zero.
Receive FIFO Drain Flag
Provides a method for the DSPI to request that entries be removed from the RX FIFO. The bit is set while
the RX FIFO is not empty. The RFDF bit can be cleared by writing 1 to it or by acknowledgement from the
DMA controller when the RX FIFO is empty.
16
Reserved
15–12
TXCTR
11–8
TXNXTPTR
7–4
RXCTR
3–0
POPNXTPTR
0 Rx FIFO is empty.
1 Rx FIFO is not empty.
This read-only field is reserved and always has the value zero.
TX FIFO Counter
Indicates the number of valid entries in the TX FIFO. The TXCTR is incremented every time the PUSHR
is written. The TXCTR is decremented every time a SPI command is executed and the SPI data is
transferred to the shift register.
Transmit Next Pointer
Indicates which TX FIFO Entry is transmitted during the next transfer. The TXNXTPTR field is updated
every time SPI data is transferred from the TX FIFO to the shift register.
RX FIFO Counter
Indicates the number of entries in the RX FIFO. The RXCTR is decremented every time the POPR is
read. The RXCTR is incremented every time data is transferred from the shift register to the RX FIFO.
Pop Next Pointer
Contains a pointer to the RX FIFO entry to be returned when the POPR is read. The POPNXTPTR is
updated when the POPR is read.
1410
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.