K60P100M100SF2RM Datasheet, PDF (158/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Communication interfaces
3.9.7.2 SD bus pullup/pulldown constraints
The SD standard requires the SD bus signals (except the SD clock) to be pulled up during
data transfers. The SDHC also provides a feature of detecting card insertion/removal, by
detecting voltage level changes on DAT[3] of the SD bus. To support this DAT[3] must
be pulled down. To avoid a situation where the SDHC detects voltage changes due to
normal data transfers on the SD bus as card insertion/removal, the interrupt relating to
this event must be disabled after the card has been inserted and detected. It can be re-
enabled after the card is removed.
3.9.8 I²S configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Peripheral
bridge
Register
access
I²S
Module signals
Topic
Full description
System memory map
Clocking
Power management
Signal multiplexing
Figure 3-64. I²S configuration
Table 3-75. Reference links to related information
Related module
I²S
Port control
Reference
I2S
System memory map
Clock Distribution
Power management
Signal Multiplexing
NOTE
The I2S master clock can be output on the I2S0_MCLK pin or
input on the I2S0_CLKIN pin. Using the I2S0_RX_BCLK pin
to output the I2S master clock in synchronous mode is not
supported on this device.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
158
Freescale Semiconductor, Inc.