K60P100M100SF2RM Datasheet, PDF (223/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 9 Debug
Table 9-5. MDM-AP Control register assignments (continued)
Bit
Name
7 LLS, VLLSx Status Acknowledge
Secure¹
Description
N
Set this bit to acknowledge the DAP LLS and VLLS Status bits have
been read. This acknowledge automatically clears the status bits.
This bit is used by the debugger to clear the sticky LLS and VLLSx
mode entry status bits. This bit is asserted and cleared by the
debugger.
8 – Reserved for future use
N
31
1. Command available in secure mode
9.5.2
Bit
0
1
2
3
4
5
6
MDM-AP Status Register
Table 9-6. MDM-AP Status register assignments
Name
Flash Mass Erase Acknowledge
Flash Ready
Description
The Flash Mass Erase Acknowledge bit is cleared after any system reset.
The bit is also cleared at launch of a mass erase command due to write of
Flash Mass Erase in Progress bit in MDM AP Control Register. The Flash
Mass Erase Acknowledge is set after Flash control logic has started the
mass erase operation.
When mass erase is disabled (via MEEN and SEC settings), an erase
request due to seting of Flash Mass Erase in Progress bit is not
acknowledged.
Indicate Flash has been initialized and debugger can be configured even
if system is continuing to be held in reset via the debugger.
System Security
Indicates the security state. When secure, the debugger does not have
access to the system bus or any memory mapped peripherals. This bit
indicates when the part is locked and no system bus access is possible.
System Reset
Indicates the system reset state.
0 System is in reset
1 System is not in reset
Reserved
Mass Erase Enable
Indicates if the MCU can be mass erased or not
0 Mass erase is disabled
1 Mass erase is enabled
Backdoor Access Key Enable
Indicates if the MCU has the backdoor access key enabled.
0 Disabled
1 Enabled
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
223