K60P100M100SF2RM Datasheet, PDF (818/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Register Definition
ADCx_OFS field descriptions
Field
31–16
Reserved
15–0
OFS
Description
This read-only field is reserved and always has the value zero.
Offset error correction value
34.3.9 ADC plus-side gain register (ADCx_PG)
The plus-side gain register (PG) contains the gain error correction for the plus-side input
in differential mode or the overall conversion in single-ended mode. PG, a 16-bit real
number in binary format, is the gain adjustment factor, with the radix point fixed between
ADPG15 and ADPG14. This register must be written by the user with the value
described in the calibration procedure or the gain error specifications may not be met.
Addresses: ADC0_PG is 4003_B000h base + 2Ch offset = 4003_B02Ch
ADC1_PG is 400B_B000h base + 2Ch offset = 400B_B02Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
PG
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
ADCx_PG field descriptions
Field
31–16
Reserved
15–0
PG
Description
This read-only field is reserved and always has the value zero.
Plus-side gain
34.3.10 ADC minus-side gain register (ADCx_MG)
The minus-side gain register (MG) contains the gain error correction for the minus-side
input in differential mode. This register is ignored in single-ended mode. MG, a 16-bit
real number in binary format, is the gain adjustment factor, with the radix point fixed
between ADMG15 and ADMG14. This register must be written by the user with the
value described in the calibration procedure or the gain error specifications may not be
met.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
818
Freescale Semiconductor, Inc.