K60P100M100SF2RM Datasheet, PDF (1252/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definitions
USBx_ISTAT field descriptions (continued)
Field
5
RESUME
4
SLEEP
3
TOKDNE
2
SOFTOK
1
ERROR
0
USBRST
Description
This bit is set when the USB Module detects an attach of a USB device. This signal is only valid if
HOSTMODEEN is true. This interrupt signifies that a peripheral is now present and must be configured.
This bit is set depending upon the DP/DM signals, and can be used to signal remote wake-up signaling on
the USB bus. When not in suspend mode this interrupt should be disabled.
This bit is set when the USB Module detects a constant idle on the USB bus for 3 milliseconds. The sleep
timer is reset by activity on the USB bus.
This bit is set when the current token being processed has completed. The processor should immediately
read the STAT register to determine the EndPoint and BD used for this token. Clearing this bit (by writing
a one) causes the STAT register to be cleared or the STAT holding register to be loaded into the STAT
register.
This bit is set when the USB Module receives a Start Of Frame (SOF) token.
In Host mode this bit is set when the SOF threshold is reached, so that software can prepare for the next
SOF.
This bit is set when any of the error conditions within the ERRSTAT register occur. The processor must
then read the ERRSTAT register to determine the source of the error.
This bit is set when the USB Module has decoded a valid USB reset. This informs the Microprocessor that
it should write 0x00 into the address register and enable endpoint 0. USBRST is set after a USB reset has
been detected for 2.5 microseconds. It is not asserted again until the USB reset condition has been
removed and then reasserted.
45.4.10 Interrupt Enable Register (USBx_INTEN)
The Interrupt Enable Register contains enable bits for each of the interrupt sources within
the USB Module. Setting any of these bits enables the respective interrupt source in the
ISTAT register. This register contains the value of 0x00 after a reset.
Addresses: USB0_INTEN is 4007_2000h base + 84h offset = 4007_2084h
Bit
Read
Write
Reset
7
STALLEN
0
6
5
4
ATTACHEN RESUMEEN SLEEPEN
0
0
0
3
2
1
0
TOKDNEEN SOFTOKEN ERROREN USBRSTEN
0
0
0
0
USBx_INTEN field descriptions
Field
7
STALLEN
6
ATTACHEN
STALL Interrupt Enable
0 The STALL interrupt is not enabled.
1 The STALL interrupt is enabled.
ATTACH Interrupt Enable
0 The ATTACH interrupt is not enabled.
1 The ATTACH interrupt is enabled.
Description
Table continues on the next page...
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.