K60P100M100SF2RM Datasheet, PDF (835/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

AVGE
0
1
1
1
1
Chapter 34 Analog-to-Digital Converter (ADC)
Table 34-108. Average number factor (AverageNum)
AVGS[1:0]
xx
00
01
10
11
Average number factor (AverageNum)
1
4
8
16
32
Mode
8b s.e.
9b diff
10b s.e.
11b diff
12b s.e.
13b diff
16b s.e.
16b diff
Table 34-109. Base Conversion Time (BCT)
Base conversion time (BCT)
17 ADCK cycles
27 ADCK cycles
20 ADCK cycles
30 ADCK cycles
20 ADCK cycles
30 ADCK cycles
25 ADCK cycles
34 ADCK cycles
ADLSMP
0
1
1
1
1
Table 34-110. Long sample time adder (LSTAdder)
ADLSTS
xx
00
01
10
11
Long sample time adder
(LSTAdder)
0 ADCK cycles
20 ADCK cycles
12 ADCK cycles
6 ADCK cycles
2 ADCK cycles
Table 34-111. High Speed Conversion time Adder (HSCAdder)
ADHSC
0
1
High Speed Conversion Time Adder (HSCAdder)
0 ADCK cycles
2 ADCK cycles
Note
The ADCK frequency must be between f_ADCK minimum and
f_ADCK maximum to meet ADC specifications.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
835