K60P100M100SF2RM Datasheet, PDF (1035/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

FTM counter
the beginning of new PWM cycles
Chapter 39 FlexTimer (FTM)
channel (n) output
(before fault control)
FAULTIN bit
channel (n) output
(after fault control with
manual fault clearing
and POLn=0)
FAULTF bit
FAULTF bit is cleared
NOTE
The channel (n) output is after the fault control with manual fault clearing and POLn = 0.
Figure 39-236. Fault Control with Manual Fault Clearing
39.4.16.3 Fault Inputs Polarity Control
The FLTjPOL bit selects the fault input j polarity (where j = 0, 1, 2, 3).
• If FLTjPOL = 0, the fault j input polarity is high, so the logical one at the fault input j
indicates a fault.
• If FLTjPOL = 1, the fault j input polarity is low, so the logical zero at the fault input j
indicates a fault.
39.4.17 Polarity Control
The POLn bit selects the channel (n) output polarity.
• If POLn = 0, the channel (n) output polarity is high, so the logical one is the active
state and the logical zero is the inactive state.
• If POLn = 1, the channel (n) output polarity is low, so the logical zero is the active
state and the logical one is the inactive state.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1035