K60P100M100SF2RM Datasheet, PDF (1122/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional description
The RTC includes its own analog POR block, which generates a power-on-reset signal
whenever the RTC module is powered up and initializes all RTC registers to their default
state. A software reset bit can also initialize all RTC registers. The RTC also monitors the
chip power supply and electrically isolates itself when the rest of the chip is powered
down.
Any attempt to access an RTC register (except the access control registers) when VBAT
is powered down, when the RTC is electrically isolated, or when VBAT POR is asserted,
will result in a bus error.
43.3.1.1 Oscillator control
The 32.768 kHz crystal oscillator is disabled at VBAT POR and must be enabled by
software. After enabling the cystal oscillator, wait the oscillator startup time before
setting the SR[TCE] bit or using the oscillator clock external to the RTC.
The crystal oscillator includes tunable capacitors that can be configured by software. Do
not change the capacitance unless the oscillator is disabled.
43.3.1.2 Software reset
Writing one to the CR[SWR] forces the equivalent of a VBAT POR to the rest of the
RTC module. The CR[SWR] is not affected by the software reset and must be cleared by
software. The access control registers are not affected by either VBAT POR or the
software reset; they are reset by the chip reset.
43.3.1.3 Supervisor access
When the supervisor access control bit is clear, only supervisor mode software can write
to the RTC registers, non-supervisor mode software will generate a bus error. Both
supervisor and non-supervisor mode software can always read the RTC registers.
43.3.2 Time counter
The time counter consists of a 32-bit seconds counter that increments once every second
and a 16-bit prescaler register that increments once every 32.768 kHz clock cycle.
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.