K60P100M100SF2RM Datasheet, PDF (1447/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 50 Inter-Integrated Circuit (I2C)
I2C memory map (continued)
Absolute
address
(hex)
Register name
4006_7008 I2C SMBus Control and Status register (I2C1_SMB)
4006_7009 I2C Address Register 2 (I2C1_A2)
4006_700A I2C SCL Low Timeout Register High (I2C1_SLTH)
4006_700B I2C SCL Low Timeout Register Low (I2C1_SLTL)
Width
(in bits)
Access
Reset value
Section/
page
8
R/W
00h
50.3.9/
1455
8
R/W
C2h
50.3.10/
1456
8
R/W
00h
50.3.11/
1457
8
R/W
00h
50.3.12/
1457
50.3.1 I2C Address Register 1 (I2Cx_A1)
This register contains the slave address to be used by the I2C module.
Addresses: I2C0_A1 is 4006_6000h base + 0h offset = 4006_6000h
I2C1_A1 is 4006_7000h base + 0h offset = 4006_7000h
Bit
7
6
5
4
3
2
1
0
Read
0
AD[7:1]
Write
Reset
0
0
0
0
0
0
0
0
I2Cx_A1 field descriptions
Field
7–1
AD[7:1]
0
Reserved
Address
Description
Contains the primary slave address used by the I2C module when it is addressed as a slave. This field is
used in the 7-bit address scheme and the lower seven bits in the 10-bit address scheme.
This read-only field is reserved and always has the value zero.
50.3.2 I2C Frequency Divider register (I2Cx_F)
Addresses: I2C0_F is 4006_6000h base + 1h offset = 4006_6001h
I2C1_F is 4006_7000h base + 1h offset = 4006_7001h
Bit
7
6
5
4
3
2
1
0
Read
MULT
ICR
Write
Reset
0
0
0
0
0
0
0
0
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1447