K60P100M100SF2RM Datasheet, PDF (1262/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definitions
45.4.21 BDT Page Register 2 (USBx_BDTPAGE2)
The Buffer Descriptor Table Page Register 2 contains an 8-bit value used to compute the
address where the current Buffer Descriptor Table (BDT) resides in system memory.
Addresses: USB0_BDTPAGE2 is 4007_2000h base + B0h offset = 4007_20B0h
Bit
7
6
5
4
3
2
1
0
Read
Write
BDTBA
Reset
0
0
0
0
0
0
0
0
USBx_BDTPAGE2 field descriptions
Field
7–0
BDTBA
Description
This 8 bit field provides address bits 23 through 16 of the BDT base address, which defines where the
Buffer Descriptor Table resides in system memory.
45.4.22 BDT Page Register 3 (USBx_BDTPAGE3)
The Buffer Descriptor Table Page Register 3 contains an 8-bit value used to compute the
address where the current Buffer Descriptor Table (BDT) resides in system memory.
Addresses: USB0_BDTPAGE3 is 4007_2000h base + B4h offset = 4007_20B4h
Bit
7
6
5
4
3
2
1
0
Read
Write
BDTBA
Reset
0
0
0
0
0
0
0
0
USBx_BDTPAGE3 field descriptions
Field
7–0
BDTBA
Description
This 8 bit field provides address bits 31 through 24 of the BDT base address, which defines where the
Buffer Descriptor Table resides in system memory.
45.4.23 Endpoint Control Register (USBx_ENDPTn)
The Endpoint Control Registers contain the endpoint control bits for each of the 16
endpoints available within the USB Module for a decoded address. The format for these
registers is shown in the following figure. Endpoint 0 (ENDPT0) is associated with
control pipe 0, which is required for all USB functions. Therefore, after a USBRST
interrupt occurs the processor core should set the ENDPT0 register to contain 0x0D.
1262
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.