K60P100M100SF2RM Datasheet, PDF (1537/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 51 Universal Asynchronous Receiver/Transmitter (UART)
51.4.2.6 Receiving break characters
The UART recognizes a break character when a start bit is followed by eight, nine, or ten
logic 0 data bits and a logic 0 where the stop bit should be. Receiving a break character
has these effects on UART registers:
• Sets the framing error flag, S1[FE].
• Writes an all "0" dataword to the data buffer, which may cause S1[RDRF] to set
depending on the watermark and number of values in the data buffer.
• May set the overrun flag, S1[OR], noise flag, S1[NF], parity error flag, S1[PE], or
the receiver active flag, S2[RAF].
The detection threshold for a break character can be adjusted when using an internal
oscillator in a LIN system by setting the S2[LBKDE] bit. The UART break character
detection threshold depends on the C1[M] and C1[PE] bits, the C4[LBKDE] bit, and the
C4[M10] bit. Refer to the following table.
Table 51-199. Receive break character detection threshold
LBKDE
M
0
0
0
1
0
1
0
1
1
0
1
1
M10
PE
Threshold (bits)
—
—
10
0
—
11
1
0
11
1
1
12
—
—
11
—
—
12
While C4[LBKDE] is set, it will have these effects on the UART registers:
• Prevents the S1[RDRF], S1[FE], S1[NF], and S1[PF] flags from being set. However,
if they are already set they will remain set.
• Sets the LIN break detect interrupt flag, S2[LBKDIF] if a LIN break character is
received.
Break characters are not detected or supported when C7816[ISO_7816E] is set/enabled.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1537