K60P100M100SF2RM Datasheet, PDF (1243/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 45 Universal Serial Bus OTG Controller (USBOTG)
Table 45-5. USB Responses to DMA Overrun Errors (continued)
Errors due to Memory Latency
Errors due to Oversized Packets
—
The data written to memory is clipped to the MaxPacket size
so as not to corrupt system memory.
The DMA_ERR bit is set in the ERR_STAT register for host Asserts the DMA_ERR bit of the ERR_STAT register (which
and device modes of operation. Depending on the values of could trigger an interrupt) and a TOK_DNE interrupt fires.
the INT_ENB and ERR_ENB register, the core may assert an (Note: The TOK_PID field of the BDT is not 1111 because
interrupt to notify the processor of the DMA error.
the DMA_ERR is not due to latency).
• For host mode, the TOK_DNE interrupt fires and the The packet length field written back to the BDT is the
TOK_PID field of the BDT is 1111 to indicate the DMA MaxPacket value that represents the length of the clipped
latency error. Host mode software can decide to retry data actually written to memory.
or move to next scheduled item.
• In device mode, the BDT is not written back nor is the
TOK_DNE interrupt triggered because it is assumed
that a second attempt is queued and will succeed in the
future.
From here, the software can decide an appropriate course of action for future transactions such as stalling the endpoint,
canceling the transfer, disabling the endpoint, etc.
45.4 Memory Map/Register Definitions
This section provides the memory map and detailed descriptions of all USB interface
registers.
Absolute
address
(hex)
USB memory map
Register name
Width
(in bits)
Access
Reset value
4007_2000 Peripheral ID Register (USB0_PERID)
8
R
04h
4007_2004 Peripheral ID Complement Register (USB0_IDCOMP)
8
R
FBh
4007_2008 Peripheral Revision Register (USB0_REV)
8
R
33h
4007_200C Peripheral Additional Info Register (USB0_ADDINFO)
8
R
01h
4007_2010 OTG Interrupt Status Register (USB0_OTGISTAT)
8
R/W
00h
4007_2014 OTG Interrupt Control Register (USB0_OTGICR)
8
R/W
00h
4007_2018 OTG Status Register (USB0_OTGSTAT)
8
R/W
00h
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1243