K60P100M100SF2RM Datasheet, PDF (56/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Section Number
Title
Page
56.1.2 Features........................................................................................................................................................1788
56.1.3 Modes of operation......................................................................................................................................1788
56.2 External signal description............................................................................................................................................1790
56.2.1 TCK—Test clock input................................................................................................................................1790
56.2.2 TDI—Test data input...................................................................................................................................1790
56.2.3 TDO—Test data output................................................................................................................................1790
56.2.4 TMS—Test mode select...............................................................................................................................1790
56.3 Register description......................................................................................................................................................1791
56.3.1 Instruction register.......................................................................................................................................1791
56.3.2 Bypass register.............................................................................................................................................1791
56.3.3 Device identification register.......................................................................................................................1791
56.3.4 Boundary scan register.................................................................................................................................1792
56.4 Functional description...................................................................................................................................................1793
56.4.1 JTAGC reset configuration..........................................................................................................................1793
56.4.2 IEEE 1149.1-2001 (JTAG) Test Access Port..............................................................................................1793
56.4.3 TAP controller state machine.......................................................................................................................1793
56.4.4 JTAGC block instructions............................................................................................................................1795
56.4.5 Boundary scan..............................................................................................................................................1798
56.5 Initialization/Application information..........................................................................................................................1798
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
56
Freescale Semiconductor, Inc.